Characterizing dimensions of structures via scanning probe microscopy

ABSTRACT

A method comprising characterizing the dimensions of structures on a semiconductor device having dimensions less than approximately 100 nanometers (nm) using one of scanning probe microscopy (SPM) or profilometry.

BACKGROUND

Integrated circuits are fabricated on the surface of a semiconductorwafer in layers, and later singulated into individual semiconductordevices, or “dies.” Many fabrication processes are repeated numeroustimes, constructing layer after layer until fabrication is complete.Metal layers, which typically increase in number as device complexityincreases, include patterns of conductive material that are verticallyinsulated from one another by alternating layers of insulating material.Conductive traces are also separated within each layer by an insulating,or dielectric, material. Vertical, conductive tunnels called “vias”typically pass through insulating layers to form conductive pathwaysbetween adjacent conductive patterns.

Advancements in the size and speed of semiconductor devices continue tooccur in order to meet consumer and competitive demands. The reductionin size of device features that accompanies such advancements alsopushes innovation in the capabilities of manufacturing tools.Particularly, measurement techniques and tools must be able toaccurately detect smaller and smaller dimensions.

SUMMARY

The problems noted above are solved in large part by a method forcharacterizing dimensions of structures by way of scanning probemicroscopy. An exemplary embodiment comprises a method comprisingcharacterizing the dimensions of structures on a semiconductor devicehaving dimensions less than approximately 100 nanometers (nm) using oneof scanning probe microscopy (SPM) or profilometry. Another exemplaryembodiment comprises a method comprising establishing a referenceposition on a semiconductor device using one of SPM or profilometry,establishing a target position on an upper surface of the structureusing one of SPM or profilometry, said upper surface facing away fromthe device. The method further comprises determining the differencebetween the reference position and the target position, wherein thereference position and the portion of the device coupled to thestructure are coplanar.

BRIEF DESCRIPTION OF THE DRAWINGS

For a detailed description of exemplary embodiments of the invention,reference will now be made to the accompanying drawings in which:

FIG. 1 a shows a cross-sectional side view of a semiconductor devicesurface comprising multiple sub-100 nm structures, in accordance withembodiment of the invention;

FIG. 1 b shows the configuration of FIG. 1 a, wherein the surfaces ofthe sub-100 nm structures are shown as a continuous contour, inaccordance with embodiments of the invention; and

FIG. 2 shows a cross-sectional side view of a SRAM array on a surface ofa semiconductor device, in accordance with embodiments of the invention.

NOTATION AND NOMENCLATURE

Certain terms are used throughout the following description and claimsto refer to particular system components. As one skilled in the art willappreciate, companies may refer to a component by different names. Thisdocument does not intend to distinguish between components that differin name but not function. In the following discussion and in the claims,the terms “including” and “comprising” are used in an open-endedfashion, and thus should be interpreted to mean “including, but notlimited to . . . .” Also, the term “couple” or “couples” is intended tomean either an indirect or direct electrical connection. Thus, if afirst device couples to a second device, that connection may be througha direct electrical connection, or through an indirect electricalconnection via other devices and connections.

The term “integrated circuit” or “IC” refers to a set of electroniccomponents and their interconnections (internal electrical circuitelements, collectively) that are patterned on the surface of amicrochip. The term “semiconductor device” refers generically to anintegrated circuit (IC). The term “die” (“dies” for plural) refersgenerically to an integrated circuit or semiconductor device, which maybe a portion of a wafer, in various stages of completion, including theunderlying semiconductor substrate, insulating materials, and allcircuitry patterned thereon. The term “trench” refers generically to anyfeature that adds a dimension among the materials forming a die. To theextent any term is not specifically defined in this specification, theintent is that the term be given its plain and ordinary meaning.

DETAILED DESCRIPTION

The following discussion is directed to various embodiments of theinvention. Although one or more of these embodiments may be preferred,the embodiments disclosed should not be interpreted, or otherwise used,as limiting the scope of the disclosure, including the claims. Inaddition, one skilled in the art will understand that the followingdescription has broad application, and the discussion of any embodimentis meant only to be exemplary of that embodiment, and not intended tointimate that the scope of the disclosure, including the claims, islimited to that embodiment.

Provided herein are methods of characterizing the dimensions ofstructures on semiconductor devices, such as integrated circuits (IC),via scanning probe microscopy (SPM) and/or profilometry, where a devicecomprises structures having dimensions less than about 100 nanometers.While the measurement techniques disclosed herein are primarilydiscussed in context of SPM, any technique, such as profilometry, alsomay be used. In accordance with various embodiments, the dimensions ofstructures are characterized by reckoning the distance from a probe ofthe SPM at a reference position to the probe of the SPM at a secondposition. The reference position may be represented by a singlemeasurement, an average of multiple measurements, or a range ofmeasurements taken at one or more positions designed to be in the sameplane.

SPM permits the imaging and measuring of surfaces on a fine scale (e.g.,on the scale of several microns), even to the level of molecules and/orgroups of atoms. A variety of SPM techniques exist and may be used incontext of the subject matter presented below. Such techniques include,among others, atomic force microscopy (AFM), scanning tunnelingmicroscopy (STM), and near-field scanning optical microscopy (NSOM).Specifically, AFM measures the interaction force between a tip of theprobe and a surface that is to be measured. The tip may be draggedacross the surface, or may vibrate as it moves. The interaction forcewill depend on the nature of the sample, the probe tip and the distancetherebetween. STM measures a weak electrical current flowing between tipand sample as they are held apart from each other. NSOM scans a lightsource that is located in substantially close proximity to the sample.Detection of this light energy is used to form images or measurements.NSOM can provide resolution below that of the conventional lightmicroscope. The scope of disclosure is not limited to these types ofSPM. SPM is described in greater detail in U.S. Pat. No. 5,371,365,which is incorporated herein by reference.

FIG. 1 a illustrates an example of a cross-sectional view of a surface100 exhibiting structures of varying dimensions. A SPM probe 101 may beemployed to characterize the dimensions of the structures on the surface100. The height of structure 108, for example, may be characterized byreckoning the distance from a SPM probe measurement taken at position105 to a SPM probe measurement taken at a second position 110. The probe101, in this illustration having a width of 60 nm, may be placed atposition 105 between structures 103 and 108 as the distance betweenstructures 103 and 108 is 150 nm.

The probe 101 may also be employed to characterize the dimensions of aseries of structures 120 having dimensions smaller than the probe 101.The structures in the series 120, such as structure A and structure B,are 30 nm wide and divided by distances of 30 nm. Thus, the 60 nm probe101 will not reach position Z, for example, in order to characterize thedimensions the structures in the series 120. In embodiments, the SPMprobe 101 scans the surface 100 in order to create a profile of thestructures. Where the probe 101 will not reach certain positions, suchas position Z among the series of structures 120 having dimensionssmaller than the probe, it may scan the contour of the series 120 inorder to create a profile of the contour of the series 120. Such aprofile of the surface 100 is illustrated in FIG. 1 b.

FIG. 1 b illustrates what may result from a scan of the surface 100 inFIG. 1 a with an SPM probe. The probe scan takes measurements atpositions it may reach to create an outline of the structures on thesurface 100. Thus, a scan of the series of structures 120 outlines thecontour 122 of the series 120.

The dimensions of the structures in the series 120 may be characterizedby establishing a reference position. The surface 100 may be designedsuch that positions 115, Z, and E, for example, are all designed to bein the same plane. In such a case, position 115 may be a referenceposition for characterizing the dimensions, e.g. heights, of structuresin series 120 where a larger probe 101 will not reach. The referenceposition may comprise any position having dimensions that permit accessby the SPM probe.

Thus, in various embodiments, by establishing a reference position, aSPM probe may characterize the dimensions of structures, includingsub-100 nm structures, on a surface 100 that includes structures havingdimensions smaller than the probe 101. Measurements for suchcharacterizations may be accomplished independent of the size of the SPMprobe. Such SPM probes may comprise a tip size less than or equal toabout 1000 nm in diameter. The probe may scan a surface 100 to outlinethe contour 122 of the surface 100, such as illustrated by FIGS. 1 a and1 b. Positions 105 and 115, accessible by probe 101 and designed to bein the same plane as positions not accessible by probe, such as positionZ and position E, may be used to establish a reference position. In someembodiments, the reference position comprises an average of measurementsat positions designed to be in the same plane. For example, wherepositions 105, 115, and 124 are designed to be in the same plane, thereference position for characterizing the dimensions of structures notaccessible by probe may be established by averaging probe measurementstaken at positions 105, 115, and 124.

The various heights of structures among the series 120 may becharacterized by reckoning the distance from the height of the probe atthe established reference position to the height of the probe at thevarious positions along the contour 122.

In some embodiments, characterizing the dimensions of structurescomprises measuring step height in an SRAM array. In other embodiments,structures that may be characterized by the method provided compriseDRAM, Logic, inductors, input/output structures, or combinationsthereof. FIG. 2 illustrates a surface 200 of a cross-sectional view ofan SRAM array 210 on a section of a semiconductor device, which includessub-100 nm structures, and the surrounding dummy active region 240. Thefield oxide of the SRAM 210 may contain many structures with dimensionssmaller than the smallest SPM probe, e.g., 10 nm structures 214. In thisexample, a distance 244 between at least some oxides may beapproximately 3 micrometers.

The step height 205 of the SRAM may be defined as the difference betweenthe height of a SPM probe when scanning the surface 242 of the dummyactive region 240, and the height of the SPM probe when scanning thesurface contour of the SRAM 210 field oxide. The SPM probe may scan thesurface of the dummy active region 240 in order to establish the heightof the SPM probe at the surface of the dummy active 242 as the referenceposition. The device may be designed such that the base of the SRAM isthe same height as the surface of the dummy active. The SPM probe mayalso scan the surface of the SRAM 210 in order to outline the contour ofthe structures 214 of the field oxide. The scan of the contour of thefield oxide region may capture variations in the height of thestructures 214.

The difference between height of the SPM probe at the referenceposition(s) 242 and the height(s) of the SPM probe along the contour ofthe SRAM 210 and its structures 214 may provide the step height 205 ofthe SRAM 210. In addition, such characterization may indicate the rangeof heights of structures 214 in the SRAM 210. In some embodiments,measuring the height of the SPM probe at one or more positions on thedummy active 242 establishes a reference position or average referenceposition. In other embodiments, establishing a reference position atmultiple points on a wafer may be used to indicate the variation in stepheight across a wafer.

In various embodiments, the method provided may be employed tocharacterize the dimensions of structures on a semiconductor devicecomprising sub-100 nm structures via SPM in less than or equal to about1 hour. Specifically, the SPM probe is able to scan the surface contourof the SRAM 210 without measuring the SRAM step height between eachoxide structure. That is, instead of making several time-consumingmeasurements to repeatedly determine step height, only a fewmeasurements are made and the step height is thereafter determined bycalculation. Thus, in some situations, using SPM to characterize thedimensions of structures on a device comprising sub-100 nm structuresmay require less than 20 seconds.

While various embodiments of the invention have been shown anddescribed, modifications thereof can be made by one skilled in the artwithout departing from the spirit and teachings of the invention. Thetechniques disclosed herein may be applied to any semiconductor device,such as an integrated circuit. The embodiments described herein areexemplary only, and are not intended to be limiting. Equivalenttechniques and ingredients may be substituted for those shown, and otherchanges can be made within the scope of the present invention as definedby the appended claims. Many variations and modifications of theinvention disclosed herein are possible and are within the scope of theinvention. Accordingly, the scope of protection is not limited by thedescription set out above, but is only limited by the claims whichfollow, that scope including all equivalents of the subject matter ofthe claims.

1. A method comprising characterizing the dimensions of structures on asemiconductor device having dimensions less than approximately 100nanometers (nm) using one of scanning probe microscopy (SPM) orprofilometry.
 2. The method of claim 1 wherein characterizing thedimensions of structures comprises determining the distance from a probeof one of a SPM or profilometer at a reference position to the probe ata second position.
 3. The method of claim 2 wherein the referenceposition comprises an average of measurements at positions designed tobe in the same plane.
 4. The method of claim 2 wherein the referenceposition comprises any position having dimensions that permit access bythe probe.
 5. The method of claim 1 wherein said structures are selectedfrom a group consisting of static random access memory (SRAM) arrays,dynamic random access memory (DRAM) arrays, inductors, input/outputstructures, and combinations thereof.
 6. The method of claim 1 whereincharacterizing the dimensions of structures comprises measuring stepheight in a static random access memory (SRAM) array.
 7. The method ofclaim 6 wherein measuring step height in an SRAM array comprisesdetermining the distance from one of a SPM probe or profilometer probeat a dummy active to one of a SPM probe or profilometer probe on a SRAMfield oxide.
 8. The method of claim 1 wherein the device has dimensionsbetween approximately 0.2 nm and 100 nm.
 9. A method of characterizing astructure on a semiconductor device, comprising: establishing areference position on the device using one of scanning probe microscopy(SPM) or profilometry; establishing a target position on an uppersurface of the structure using one of SPM or profilometry, said uppersurface facing away from the device; and determining the differencebetween the reference position and the target position; wherein thereference position and the portion of the device coupled to thestructure are coplanar.
 10. The method of claim 9 wherein using SPMcomprises using a technique selected from a group consisting of atomicforce microscopy (AFM), scanning tunneling microscopy (STM), andnear-field scanning optical microscopy (NSOM).
 11. The method of claim 9wherein establishing the target position on the upper surface of thestructure comprises using a structure having dimensions betweenapproximately 0.2 nanometers and 100 nanometers.
 12. The method of claim9 wherein establishing the reference position comprises determining anaverage of measurements at multiple positions on a single plane.
 13. Themethod of claim 9 wherein establishing the target position on the uppersurface of the structure comprises using a structure selected from agroup consisting of static random access memory (SRAM) arrays, dynamicrandom access memory (DRAM) arrays, inductors, input/output structures,and combinations thereof.
 14. The method of claim 9 wherein determiningthe difference occurs in less than or equal to approximately twentyseconds.
 15. The method of claim 9 wherein determining the differencecomprises determining step height in a static random access memory(SRAM) array.